/*============================================================================*/
/*                              x embedded systems                            */
/*============================================================================*/
/*                        OBJECT SPECIFICATION                                */
/*============================================================================*
* %name:            cpu_drv.h%
* %version:         2.0%
* %created_by:      David Robles%
* %date_created:    March 02 2012%
*=============================================================================*/
/* DESCRIPTION : CPU/Oscillator handling                                      */
/*============================================================================*/
/* FUNCTION COMMENT : Provices APIs to configure and use the CPU of PIC micro */
/*                                                                            */
/*                                                                            */
/*============================================================================*/
/*                               OBJECT HISTORY                               */
/*============================================================================*/
/*  REVISION |   DATE      |                               |      AUTHOR      */
/*----------------------------------------------------------------------------*/
/*  1.0      | 02/03/2012  |                               | David Robles     */
/* File created                                                               */
/*----------------------------------------------------------------------------*/
/*  2.0      | 14/03/2012  |                               | David Robles     */
/* Added macros and simbols that permits a most high level programing         */
/* in the cpu_drv file.                                                       */
/*============================================================================*/

#ifndef CPU_DRV_H                   /* To avoid double inclusion */
#define CPU_DRV_H

/* Includes */
/* -------- */
#include "stdtypedef.h"

/* Exported types and constants */
/* ---------------------------- */

/* Types definition */
/* typedef */


/*==================================================*/ 
/* Declaration of exported constants                */
/*==================================================*/ 
/* BYTE constants */


/* WORD constants */


/* LONG and STRUCTURE constants */



/*======================================================*/ 
/* Definition of RAM variables                          */
/*======================================================*/ 
/* BYTES */


/* WORDS */


/* LONGS and STRUCTURES */


/*======================================================*/ 
/* close variable declaration sections                  */
/*======================================================*/ 

/* Exported functions prototypes and macros */
/* ---------------------------------------- */

/* Functions prototypes */
PUBLIC_FCT void cpu_drv_init (void);

/* BLOCK REGISTER */

/*  OSCCON: OSCILLATOR CONTROL REGISTER           */
/*  BIT7 ...                            ... BIT0  */
/*  IDLEN IRCF2 IRCF1 IRCF0 OSTS IOFS SCS1  SCS0  */
/*  R/W-0 R/W-1 R/W-0 R/W-0 R(1) R-0  R/W-0 R/W-0 */

/*======================================================*/ 
/* Exported defines                                     */
/*======================================================*/ 

/* ------------ System Clock options -------------- */
/* 1x = Internal oscillator block  */
#define INTERNAL_OSC 0x02
/* 01 = Timer1 oscillator          */
#define TIMER_1_OSC  0x01
/* 00 = Primary oscillator         */
#define PRIMARY_OSC  0x00

/* ----- Internal Oscillator Frequency options ----- */
/* 111 = 8 MHz (INTOSC drives clock directly)                     */
#define INTOSC_8_MHZ  0x07
/* 110 = 4 MHz                                                    */
#define INTOSC_4_MHZ  0x06
/* 101 = 2 MHz                                                    */
#define INTOSC_2_MHZ  0x05
/* 100 = 1 MHz (Default on reset)                                 */
#define INTOSC_1_MHZ  0x04
/* 011 = 500 kHz                                                  */
#define INTOSC_500KHZ 0x03
/* 010 = 250 kHz                                                  */
#define INTOSC_250KHZ 0x02
/* 001 = 125 kHz                                                  */
#define INTOSC_125KHZ 0x01
/* 000 = 31 kHz - from either INTOSC/256 or INTRC directly depending on INTSRC bit (OSCTUNE<7>) */
#define INTOSC_31KHZ  0x00

/* --------------- IDLEN: Idle Enable --------------- */
/* 1 = Device enters Idle mode on SLEEP instruction      */
#define IDLE_MODE  1
/* 0 = Device enters Sleep mode on SLEEP instruction     */
#define SLEEP_MODE 0

/* * * * * * MASK BITS AND BITS POSITION * * * * * */
#define SYS_CLOCK_BITS_POS       0
#define SYS_CLOCK_BITS_MSK       0x03
#define IOFS_BITS_POS            2
#define IOFS_BITS_MSK            0x01
#define OSTS_BITS_POS            3
#define OSTS_BITS_MSK            0x01
#define INTOSC_BITS_POS          4
#define INTOSC_BITS_MSK          0x07
#define IDLEN_BITS_POS           7
#define IDLEN_BITS_MSK           0x01
#define MSK_OSCCON_READONLY_BITS (IOFS_BITS_MSK<<IOFS_BITS_POS)|(OSTS_BITS_MSK<<OSTS_BITS_POS)

/*======================================================*/ 
/* Exported macros                                      */
/*======================================================*/ 
#define SWT_SYS_CLOCK(system_clock)              (((system_clock)&SYS_CLOCK_BITS_MSK)<<SYS_CLOCK_BITS_POS)
#define GET_IOFS()                               (((OSCCON)>>IOFS_BITS_POS)&IOFS_BITS_MSK)
#define GET_OSTS()                               (((OSCCON)>>OSTS_BITS_POS)&OSTS_BITS_MSK)
#define SWT_INTOSC(int_osc_fqy)                  (((int_osc_fqy)&INTOSC_BITS_MSK)<<INTOSC_BITS_POS)
#define SWT_IDLEN(idlen_mode)                    (((idlen_mode)&IDLEN_BITS_MSK)<<IDLEN_BITS_POS)
#define CLR_OSCCON_REG()                         OSCCON=OSCCON&MSK_OSCCON_READONLY_BITS
#define SET_OSCCON_REG(clock,intos_fqy,idlen_m)  CLR_OSCCON_REG();\
                                                 OSCCON|=((SWT_SYS_CLOCK(clock))|(SWT_INTOSC(intos_fqy))|(SWT_IDLEN(idlen_m)))

#endif